asic-design-roadmap
github.com/abdelazeem201/asic-design-roadmap ↗The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a concept to specification to tape-outs. Although the end product is typically quite small (measured in nanometers), this long journey is interesting and filled with many engineering challenges.
Use this list with your AI agent
Add the Context Awesome MCP server to Claude, Cursor, or any MCP client, then ask:
"Show me core ips and repos resources from asic-design-roadmap"
Installation instructions →What's inside
📦 Project Repositories and IPs
- 32 Mini Projects (Verilog)Core IPs and Repos
- Alex Forencich's IPsCommunication Protocols
PCIe, Ethernet, I2C, UART and more
- Basic Verilog ModulesCore IPs and Repos
Synthesizable Verilog modules
- CVA6 RISC-V CPUInformation Technology
An application class 6-stage RISC-V CPU capable of booting Linux.
- darkriscvInformation Technology
A proof of concept for the opensource RISC-V instruction set.
- FreeCoresCore IPs and Repos
Legacy IPs from OpenCores
🔧 ASIC Design Flow
- Advanced Logic Synthesis by Dhiraj TanejaLogic Synthesis & Timing Closure
- My Slideshare RTL2GDSII NotesPhysical Design
- Physical Design – Prof. Indranil SenguptaPhysical Design
- RTL to GDSII (by Adi Teman)Physical Design
Tutorials and Courses 💬Intro
- ARM GuideBuild a CPU
A guide covering ARM architecture.
- Awesome HDLHDL
- Build a Modern Computer from First Principles: From Nand to Tetris - courseraBuild a CPU
Build a modern computer system.
- Building a RISC-V CPU Core - edXBuild a CPU
Build a RISC-V cpu core. No prior knowledge of digital logic design is required.
- ChipVerifyVerification
A simple and complete set of verilog/System Verilog/UVM tutorials.
- ChipVerify: Verilog TutorialHDL
A guide for someone new to Verilog.
🌍 Awesome Digital IC Resources
- Awesome FPGA
FPGA resources and boards
- Awesome Hardware Verification
Verification tools
- Awesome HWD Tools
Open-source IC design tools
- Awesome Lattice FPGAs
Lattice FPGA board list
- Awesome Open Source EDA
Open-source EDA tools
Tools
- Awesome Open Hardware Verification - Tools
Tools
- EDA Playground
Edit, save, simulate, synthesize SystemVerilog, Verilog, VHDL and other HDLs from your web browser.
- GTKWave
GTKWave is a fully featured GTK+ based wave viewer.
- Icarus Verilog
A Verilog simulation and synthesis tool.
- OpenROAD
An RTL-to-GDS Flow
- tree-core-ide
🧱 Fundamentals
- Digital Design and Computer Architecture (YouTube)3. Computer Architecture
- Digital Design – CS221 by Dr. Waleed Youssef2. Digital Logic Design / Frontend
- Digital Electronics (Playlist)1. Digital Electronics & CMOS Basics
- Part 14. Digital IC Design (RTL to ASIC)
- Part 24. Digital IC Design (RTL to ASIC)
- Part 34. Digital IC Design (RTL to ASIC)
Online Judge Platforms
- HDL bits
A collection of small circuit design exercises for practicing digital hardware design using Verilog Hardware Description Language (HDL).
- nowcoder - Verilog Part
A verilog oj platform.
Showing a sample of 65 resources. View the full list on GitHub →