awesome-digital-ic
github.com/qninth/awesome-digital-ic ↗A collection of great digital IC project/tutorial/website etc..
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Add the Context Awesome MCP server to Claude, Cursor, or any MCP client, then ask:
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Installation instructions →What's inside
Projects and IPs
- 32 Verilog Mini Projects
32 useful mini verilog projects for beginners.
- ALEX FORENCICHCommunication Technology
Verilog IPs including PCIe/Ethernet/I2C/Uart etc.
- ALEX FORENCICH - AXICommunication Technology
Collection of AXI4 and AXI4 lite bus components. Most components are fully parametrizable in interface widths.
- ALEX FORENCICH - AXISCommunication Technology
Collection of AXI Stream bus components. Most components are fully parametrizable in interface widths.
- ALEX FORENCICH - IICCommunication Technology
I2C interface components. Includes full MyHDL testbench with intelligent bus cosimulation endpoints.
- ALEX FORENCICH - UARTCommunication Technology
A basic UART to AXI Stream IP core, written in Verilog with cocotb testbenches.
Tutorials and Courses 💬Intro
- ARM GuideBuild a CPU
A guide covering ARM architecture.
- Awesome HDLHDL
- Build a Modern Computer from First Principles: From Nand to Tetris - courseraBuild a CPU
Build a modern computer system.
- Building a RISC-V CPU Core - edXBuild a CPU
Build a RISC-V cpu core. No prior knowledge of digital logic design is required.
- ChipVerifyVerification
A simple and complete set of verilog/System Verilog/UVM tutorials.
- ChipVerify: Verilog TutorialHDL
A guide for someone new to Verilog.
AI × Chip Design
- Awesome-AI-for-Chip-DesignMore AI × IC Lists
Community-maintained list of ML/LLM research and tools for IC design.
- Awesome-LLM-Circuit-AgentMore AI × IC Lists
Academic works on RTL and analog circuit generation based on LLM agents.
- Awesome-Surveys-of-LLM4EDAMore AI × IC Lists
Surveys and reviews on LLM applications in EDA.
- ChatEDAEDA Agents
Large language model powered autonomous agent for EDA. (TCAD'24, NAACL'25)
- ChipBenchBenchmarks for AI-aided Chip Design
Comprehensive benchmark for AI-aided chip design.
- ChipMATELLM for RTL Generation & Verification
Multi-agent inference framework for RTL generation with Verilog and Python reference agents.
Awesome Awesome ⭐
- Awesome Electronics
A curated list of awesome resources for electronic engineers and hobbyists.
- Awesome FPGA
A collection of resources on FPGA devices and development in general.
- awesome-hwd-tools
A curated list of awesome open source hardware design tools with a focus on chip design.
- Awesome Lattice FPGA boards
A curated list of awesome open-source FPGA boards
- Awesome Open Source EDA Projects
A curated list of EDA open source projects.
- fpgaQuora Topics
Here are 3,136 public repositories matching "fpga" topic...
Tools
- Awesome Open Hardware Verification - ToolsProject Management & Build
Tools
- cocotbVerification
A coroutine-based cosimulation library for writing testbenches in Python.
- cocotb-coverageVerification
Functional coverage and constrained randomization extensions for cocotb.
- cocotbext-axiVerification
AXI/AXI Lite/AXI Stream interface modules for cocotb. See also
- EdalizeProject Management & Build
An abstraction library for interfacing EDA tools.
- EDA Playground
Edit, save, simulate, synthesize SystemVerilog, Verilog, VHDL and other HDLs from your web browser.
Forums
Online Judge Platforms
- HDL bits
A collection of small circuit design exercises for practicing digital hardware design using Verilog Hardware Description Language (HDL).
- nowcoder - Verilog Part
A verilog oj platform.
- USTC Verilog OJ
A verilog online judge service
Showing a sample of 128 resources. View the full list on GitHub →